Inverting Amplifier Op Amp - Analysis & Examples

Usually, Op Amp isn't used in an open-loop configuration. The Opamp is connected to some passive elements and forms a feedback circuit. The feedback can either be positive or negative, depending upon the connection. If the output is connected to the inverting terminal of the Opamp then this is known as negative feedback. Now, there are two such configurations, the inverting configuration and the non-inverting configuration. When the input signal is applied to the inverting ‘-’ input terminal of the Opamp then it is known as inverting configuration. When the input signal is applied to the non-inverting ‘+’ input terminal of the Opamp, then it is known as a Non-inverting configuration. 

The inverting configuration or amplifier serves as a basic module for designing even more complex op-amp circuits. It is simple to implement, the non-inverting input is grounded. There is a voltage source connected to the inverting terminal through the input resistance Rin. There is a feedback resistor Rf connected between the output and inverting terminal of the op-amp. It forms a closed loop around the operational amplifier. The output is 180° out of phase or inverted as that of the input signal. 

Now, let's analyze this circuit. The aim is to find out the relationship between output voltage vo and vi or the gain of the amplifier.

 

For an ideal Op Amp, we should consider the virtual ground concept. That is, the non-inverting terminal is tied to the ground. It is physically connected to the ground. However, the inverting terminal is at the virtual ground but not physically connected to the ground. We consider this because of the infinite open loop gain of the Opamp. 

Similarly, for an ideal Op Amp we should consider the input resistance of the Op Amp is infinite. No current flows through the input terminals of the Opamp. Hence the input current i1 = if. No current flows through inside the Opamp. 

Apply KCL at the node 1. 

This is the required closed-loop gain. It simply depends on the external resistors. The minus sign shows the signal inversion at the output. 

Inverting Amplifier With Compensating Resistor R:

There is another way of implementing an inverting amplifier, it is given below. In this configuration, there is a resistor known as a compensating resistor. This resistor is commonly denoted as RC. For inverting configuration, this compensating resistor is equal to:

Given:

Rin = 1kOhm

R = 1kOhm

Rf = 10kOhm

Calculate the gain.

There is no effect of a compensation resistor on the gain.

Inverting Amplifiers With Load Resistor:

Given:

Rin = 1kOhm

R = 1kOhm

Rf = 10kOhm

Calculate the gain.

Inverting Amplifier Another Configuration:

Given:

Rin = 1kOhm

R = 1kOhm

Rf = 10kOhm

Calculate the gain.

Don't get confused with the extra resistor. Start your analysis with the same method. Apply KCL at node A.

So, there is no change in the value of gain.

Frequently Asked Questions:

What are the advantages of inverting amplifiers?

It has less input impedance, because of the feedback resistor. In comparison with the open loop configuration, the input signal directly applied to the inverting terminal has much greater input resistance than the closed loop inverting configuration. The input resistance only depends on the external resistors. 

What are the disadvantages of inverting amplifiers?

Its input resistor is the biggest disadvantage as well. If an application calls for a higher input impedance, both Rin and Rf have to be greater enough. For example, to minimize signal source loading, greater values of resistors are required. However, larger values of input resistors increase offset errors which arise due to amplifier bias current.

Why is it called an inverting configuration?

The output signal is out of phase. The amplifier reverses the phase angle of the output and hence input and output are 180° out of phase with each other. 

What is the purpose of a feedback resistor? 

It determines the gain or amplification factor of the amplifier. The higher the value of the feedback resistor (Rf) as compared to the input resistor (Rin), the higher the gain of the inverting amplifier. 

What are the applications of inverting amplifiers?

It is commonly used in precision scaling applications, audio processing, active filters, voltage-controlled oscillators, and instrumentation amplifiers for sensor interfacing. 

What is the transfer function of inverting amplifiers?

The transfer function (Vout/Vin) of an inverting amplifier is given by the formula:

​

What is the maximum output of an inverting amplifier?

The maximum output voltage is limited by the power supply of the Opamp. If the external supply is ± 12V, the Opamp will saturate after this voltage. Similarly, if the supply voltage is ± 15V, the output voltage swing is limited by the power supply voltage.

Conclusion:

I have analyzed all four circuits, and they are quite similar to each other. I try to make sure that I have cleared up all the concepts in every possible way. 

Precision Half Wave Rectifier |

 Operational Amplifier Based Half Wave Rectifier:

Rectification is a process of converting an AC waveform into a single-direction pulsating DC. There is a filter block at the end of the rectification block. The purpose of this filter is to smooth the DC voltage (which is in the form of pulses). 

The process of rectification 

Diode-based rectifier circuits are commonly employed in power supply designs. In these applications, the voltages being rectified have much greater values than the voltage drop of a diode. Passive rectifiers are suitable for large signals coming from transformer windings.

In some cases, like instrumentation applications, signals coming from sensors or transducers are of very small value in the order of millivolts. In these applications, it is impossible to employ diode rectifiers because of tiny signals (less than 0.7 V). So, here comes the concept of precision rectifiers.

What is an active rectifier?

There are many ways to implement active rectifiers. But I am going to discuss opamp-based precision rectifiers. I will discuss the half-wave precision rectifier in this post. Diodes along with Opamp form a special class of rectifiers known as precision rectifiers.

Precision Half Wave Rectifiers:

It consists of an Opamp and a diode in the feedback path. The input signal is at the Non-inverting terminal of the amplifier.

The circuit works as a voltage follower during the positive half cycle only. 

vO = vi   for vi >= 0

The relationship between the input and output of the given circuit.

During the positive half cycle of the input signal, the output is also positive. The diode starts to conduct and a perfectly positive half cycle appears at the output. During the negative half cycle, the diode remains off.

OpAmp based half wave rectifier

This circuit has some limitations. The biggest drawback of this circuit is the feedback loop. Have a look at the circuit. The feedback loop will open when the diode is off (in this case during the negative half cycle of the input signal, the diode turns off). Hence Opamp gets saturated. In each cycle of the input signal Opamp switches from the linear region and the saturation region.

Improved Circuit: Precision Half Wave Rectifier With Two Diodes:

To avoid the switching of Opamp from linear region to saturation region, again and again, this circuit is useful.

 

The improved and faster circuit for half wave rectification.

In this circuit, there are two diodes and two resistors along with the Opamp. The input signal is applied to the inverting terminal. In this circuit, there is negative feedback that never gets open and won't let the Opamp to saturate. During the positive half cycle of the input signal, D2 is conducting. The output of the amplifier is negative (because of the inverting configuration), and the D2 is off during the positive half cycle. 

During the negative half cycle, the D2 I'd off. The output of the Opamp is positive. The anode of the diode D1 is at the positive potential and starts to conduct and establish negative feedback through R2. The current flows through R2 is equal to the current flows through R1. 

For R1 = R2, the transfer characteristics will be

vo = - vi   for vi <= 0

The relationship between input and output of the given circuit.

The prominent advantage of this circuit is that the feedback loop is closed throughout the circuit operation. D2 is included and hence the feedback loop remains closed.

Active Vs Passive  Rectifiers: | Difference Between Active and Passive Rectification:

So, let's discuss the difference between active and passive half-wave rectification. As a beginner, you might not be aware of the active rectification and passive rectification.  

Passive rectifiers use simple silicon diodes to convert alternating current (AC) into direct current (DC). It is composed of a simple diode, followed by a load resistor.

A silicon diode is effectively converting AC to DC

A diode is a unidirectional device that allows the flow of current only in one direction hence effectively converting AC into DC. For practical diodes, there is a forward voltage drop of 0.7V (for a silicon diode). They are suitable for rectification of large voltage signals. 

What will happen if the input voltage is 1V, after rectification from a passive rectifier, the output voltage becomes 0.3V (there is a diode drop of 0.7V). 

In this case, active rectifiers are used. They will effectively convert small AC voltages into DC voltages. They are composed of super diodes ( A super diode consists of an Opamp followed by a diode. The basic active rectifier consists of a super diode that is an operational amplifier and a diode. The negative feedback and high gain are responsible for bypassing the diode’s threshold voltage.

Comparison between output of an active (precision) rectifiers Vs passive rectifiers 

Parallel Binary Adders | Ripple Carry Adders

Design Half Adders, Full Adders, Ripple Carry Adders:

An adder is the fundamental building block of many digital systems. An adder is a digital circuit that performs the addition of two numbers. It is easy to design and made up of simple logic gates. A binary adder is a circuit that performs addition on binary numbers only. A parallel adder means all the inputs are available simultaneously, and processing each bit position is in parallel. This is in contrast to a serial adder, which adds binary numbers one bit at a time, processing each bit sequentially.

Topics:

Design a half-adder circuit using
• XOR gate
• Basic logic gates
• NAND gates
• NOR gates

Design a one-bit full adder
• Input and output
• Block diagram
• Truth Table
• Karnaugh Map to get simplified SOP expression for full adder logic
• Circuit diagram from the simplified logic expression

FAQs

 The delay associated with ripple carry adder

Design a half-adder circuit:

A half adder is a circuit that accepts two binary inputs (let's suppose A and B) of one bit. It produces two outputs (sum and carry) of one bit. For two inputs there are 22 possible input combinations. 

Here,

The input variables are designated as augend (A) and addend (B) bits. The output variables are sum (S) and output carry (CO).

The following truth table and illustration depict the same. 

Figure: How to perform addition on two binary numbers 

A	B	Sum = S	Carry = C
0	0	0	0
0	1	1	0
1	0	1	0
1	1	0	1

From the truth table, there are many possible ways to implement a half-adder. In this tutorial, the half-adder circuit is implemented in many different ways and drives their expressions as well.

1. Half adder circuit using XOR gate

2. Half adder circuit using NAND gates

3. Half adder circuit using NOR gates only 

4. Half-adder circuit using basic logic gates 

Half adder circuit using XOR gate:

This is the simplest possible implementation of a half-adder circuit. It employs only two logic gates. A and B are the two inputs. Sum and Carry are the two outputs. 

Figure: Half adder block diagram 

Figure: Half adder circuit using a xor gate and an and gate. 

Half adder circuit using basic logic gates:

The half-adder circuit can be implemented using basic logic gates. It requires 3 AND gates, an OR gate and two inverters.

Figure: Half adder circuit using basic logic gates (AND OR, NOT gates only)

Design a half-adder circuit using NAND gates only and drive its expression:

Five NAND gates are required to implement a half-adder circuit. 

Figure: Half adder circuit design using NAND gate (universal gates)

Half adder circuit using NOR gate and drive its expression:

Five NOR gates are required to implement a half-adder circuit. 

Figure: Half adder circuit design using NOR gates only 

Design a one-bit full adder with two half adders and an OR gate:

There are many techniques to implement full adders. But it is an introductory article on binary adders. It is better to start with the simple adder circuit. This full adder circuit consists of two half adders and an OR gate. It is capable of adding three 1-bit binary numbers. Two of them are inputs (A and B). The third binary number is a carry-in.
There are various steps involved in designing a full adder.

1. Input and output 
2. Block diagram
3. Truth Table
4. Karnaugh Map to get simplified SOP expression for full adder logic
5. Circuit diagram from the simplified logic expression

Input And Output:

It is an adder circuit. It will accept two inputs A and B. It performs the addition of A and B. Then it will produce two outputs sum (S) and carry (COUT). It will also accept carry from the previous stage. Have a look at the addition of two numbers. 

Block Diagram:

The block diagram is given below. The block diagram given below shows the full adder takes two binary numbers (A and B) as input. Both inputs are 1-bit numbers. There is a carry input as well. It is also 1-bit long. So, there are a total of three inputs, each input is only 1-bit long. There are two outputs S and COUT (sum and carry respectively). Both outputs are 1-bit long. There is an "add" circuit that performs addition on two binary numbers. The block diagram helps to visualize the internal workings of the full adder and its relationship to the inputs and outputs.

This adder is a building block of higher-bit adders. This is known as a one-bit full adder.

Figure: Full adder block diagram 

Truth Table:

Below is the truth table and an illustration. It shows how the addition of three binary numbers is carried out. The output represents the sum of three binary numbers.

Figure: How to perform addition on 3 binary numbers 

A	B	C	S=A⊕B⊕Cin	CO =A.B+(A⊕B)Cin
0	0	0	0	0
0	0	1	1	0
0	1	0	1	0
0	1	1	0	1
1	0	0	1	0
1	0	1	0	1
1	1	0	0	1
1	1	1	1	1

From the truth table, we can conclude that a single full adder consists of three inputs. Two inputs are the two binary numbers A and B (one bit) and the third input is the carry from the previous half-adder. 

Karnaugh Map For Full Adder Circuit:

Figure: Karnaugh Map for 1-bit full adder. It is obtained from the truth table.

Simplified equations for sum and carry

The implementation of a one-bit full adder circuit is given below:

Figure: Full adder made up of two half adders and an OR gate.

Figure: Gate level implementation of a full adder circuit. 

Some Frequently Asked Questions:

What are 1-bit full adders? How many full adder blocks are required? 

It is an adder that can add two 1-bit numbers. There is an additional input, that is carry input. This is the carry generated from the previous adder. There are two outputs, sum and carry. It comprises two half-adders. And an OR gate. To add two 1-bit binary numbers there is only one full adder required. Keep in mind that the bit width of each input is 1 bit. The figure is given below.

What are 2-bit full adders?

The block diagram is given below. From the block diagram given below, the 2-bit full adder takes two binary numbers (A and B) as input. Both inputs are 2-bit numbers. Two 1-bit full adders are required. Each full adder is capable of adding three 1-bit numbers. 
There is a carry input as well. It is 1 bit long. So, there are a total of three inputs, input A and B are 2-bit long. There are two outputs S and CO (sum and carry). The sum (S) is 2-bit long and COUT is 1-bit long. The truth table for a 2-bit full adder would have 32 entries, one for each possible combination of inputs.

Figure: 2 bit parallel full adder 

What are 3-bit adders?

The block diagram is given below. From the block diagram given below, the 3-bit full adder takes two binary numbers (A and B) as input. Both inputs are 3-bit numbers. Three 1-bit full adders are required. Each full adder is capable of adding three 1-bit numbers. 
There is a carry input as well. It is 1 bit long. So, there are a total of three inputs, input A and B are 3-bit long. There are two outputs S and CO (sum and carry). The sum (S) is 3-bit long and COUT is 1-bit long. The truth table for a 3-bit full adder would have 128 entries, one for each possible combination of inputs.

Figure: 3 bit parallel full adder 

What are 4-bit adders?

The block diagram is given below. From the block diagram given below, the 2-bit full adder takes two binary numbers (A and B) as input. Both inputs are 4-bit numbers. Two 1-bit full adders are required. Each full adder is capable of adding three 1-bit numbers. 
There is a carry input as well. It is 1 bit long. So, there are a total of three inputs, input A and B are 2-bit long. There are two outputs S and CO (sum and carry). The sum is 4-bit long and COUT is 1-bit long. The truth table for a 2-bit full adder would have 256 (2n, where n = number of input bits) entries, one for each possible combination of inputs. Here are 9 inputs applied to four full adders.

Figure: Addition of 2 binary numbers (4-bits each)

Figure: 4 bits parallel full adder 

What are n-bits adders?

In the same way, the n-bits full adders comprise of n-full adders. Both inputs A and B are n-bits long. The sum is also n-bits long. The carry output is 1 bit long. 

What are parallel binary adders?

All the above-mentioned adders are parallel binary adders. The parallel binary adders are built from full adders linked together in a cascade, with each adder's output carry wired to the input carry of the one that comes after it. For a four-bit number, there are four full adders required. For an n-bit number, there are n full adders required.

Delay Associated With Ripple Carry Adder:

In this section, I will discuss the propagation delay associated with ripple carry adder. After understanding this part you will be able to calculate propagation delay.

Let's suppose there are two binary numbers.
A is the augend, bit width: 4
B is the augend, bit width: 4
Ci is an input carry 
COUT = output carry are the output
C1, C2, and C3  are the intermediate carry signals generated from the intermediate stages.
Looking at the dock diagram, at the initial State, this circuit has 9 inputs

There are 2 inputs for each full adder. There are 4 adders, and each full adder has three inputs. The first full adder is provided with an input carry. The rest of the full adders have to wait for carry generation. 

The second full adder will generate the correct output when there is a carry generated by the first full adder.

The same is true for other full adders as well. Each full adder accepts the carry from the previous stage. 
Each full adder has to wait for the carry signal.

There must be some delay associated with the circuit. The total propagation time is equal to the propagation delay of a gate times the number of gate levels in the circuit.The maximum propagation delay time in an adder circuit is defined as 

"The time it takes the carry to propagate through the full adder."

It is quite obvious that the signal has to travel through several gates. The signal from input carry Cin has to travel through an AND gate and an OR gate. Check out the path of Cin. 

There are two gate levels for a one-bit full adder. 

For a two-bit adder, there are 2x2 gate levels for the carry to propagate from input to output.
For an 'n' bit full adder, there are 2n gate levels for the carry to propagate from input to output.

The propagation time of the carry signal from input to output increases with an increase in the number of input bits. Or in other words, as the number of bits increases, the number of parallel connected full adders increases. And hence propagation time of the carry signal from input to output also increases. This is the limiting factor on the speed with which two numbers are added.

Conclusion:

Parallel binary adders are essential components of digital systems, performing binary addition operations on multiple pairs of binary numbers simultaneously. The ripple carry adder is simple to implement, but it suffers from a carry propagation delay that limits its performance.

Attempt quiz on Parallel Binary Adders.