Bipolar Junction Transistor -BJT AC Load Line Analysis Solved Examples

BJT Load Line & Q point Analysis: Complete tutorial with solved examples. Explain ac load line with respect to BJT. Transistor Load Line Analysis

DC load line

Variation of Q point and voltage swing limitations

Variation of Q point with different circuit parameters

In the previous section, I discussed the DC load line. There is an AC load line as well. The purpose of the AC load line is similar to its DC counterpart. It gives all possible values of ic and vce of a given amplifier. It also determines the magnitude of output voltage.

Fig 1 Base bias circuit

Fig 2 AC equivalent of the circuit in fig 1

The purpose of this section is to draw the AC load line:

The DC load line is drawn between two extremes that are the saturation point and the cut-off point. The AC saturation and cut off points are different from their counterpart DC load line. The Q point is common to both the load-lines. 

This is a little bit confusing for beginners, but I tried to make it easier. As you know Q point is calculated when no signal is applied to the input. When an input is applied the AC quantities (ic and vce) vary above and below Q point. 

AC saturation point: (ic(sat))

Fig 3: AC quantities vary above and below Q point

Look at AC equivalent circuit. 

rC = RC || R1

ic =  vce / rC

∆IC =  ∆VCE / rC

OR

∆IC = ( VCEQ - vce)/ rC

Substitute vce = 0 for saturation point on y-axis 

∆IC = VCEQ / rC

From fig 3

ic(sat) = ICQ + ∆IC

Substitute ∆IC, and we get AC saturation point ic(sat)

ic(sat) = ICQ + VCEQ/rC … equation 1

Note: Equation 1 shows the upper limit of the signal swing

AC Cutoff Voltage: (vce(cut-off))

vce  = iC*rC

∆VCE = ∆IC*rC

∆VCE = (ICQ -iC)*rC

Substitute iC = 0 , for cutoff point on x-axis

∆VCE = ICQ*rC

From fig 3 

vce(cutoff) = VCEQ + ∆VCE

Substitute ∆VCE, and we get AC cutoff point vce(cutoff)

vce(cutoff) = VCEQ + ICQ*rC … equation 2

Note: Equation 2 shows the lower limit of the signal swing

Fig 4

AC Output Compliance:

What does an AC load line do? It usually describes the AC output compliance of a given amplifier. With the help of the AC load line, we can determine the maximum peak to peak unclipped output voltage. Output voltage clips, if the output compliance exceeds. 

By adjusting the Q point in the middle of the load line, we can get the maximum possible peak to peak unclipped output.

 

It is determined by the maximum peak to peak collector current IC and VCE with respect to Q point. 

The maximum possible transition for vce with respect to Q point is shown in figure 1(b), which is ∆VCE.

∆VCE = ICQ*rC

For peak to peak value, multiply by 2.

PP = 2ICQ*rC

Where,

PP = output compliance

Maximum possible transition for ic(sat) with respect to Q point is shown in figure 1(a), which is ∆IC.

∆IC = VCEQ / rC

For peak to peak value, multiply by 2.

PP = 2∆IC = 2VCEQ / rC

Where,

PP = output compliance

Fig 5 signal swings and different Q points

Example:

Fig 6

Consider the same circuit. Q point values have been calculated in the previous article. 

ICQ= 3.1 mA

VCEQ = 3.8 V

Calculate AC cut off and saturation.

ic(sat) = ICQ + VCEQ/rC

rC = RC || R1 = 666.667 ohms

ic(sat) = 3.1m + 3.8/666.66

ic(sat) = 3.1m + 5.7m

ic(sat) = 8.8 mA

vce(cutoff) = VCEQ + ICQ*rC

vce(cutoff) = 3.8 + 3.1m*666.6

vce(cutoff) = 3.8 + 2

vce(cutoff) = 4.8 V

Fig 7

Conclusion:

For a given amplifier, the AC load line intersects the DC load line at the Q point. 

The steeper the AC load line, the smaller will be the output voltage swing.

The results obtained in equation 1 and equation 2 are in terms of the Q point of the given amplifier.

What is next?

In the next post, you will learn about the Q point location on the load line.

• Centred Q point
• Q point near saturation
• Q point near cut off

After a complete understanding of this topic, you will be able to design an amplifier.

Load Line Analysis (BJT) With Solved Examples

Load line and Q point 

Outline:

• Determine biasing, Q point, and DC load line
• Compute Q point

BJT Load Line & Q point Analysis: Complete tutorial with solved examples

AC load line

Variation of Q point and voltage swing limitations

Variation of Q point with different circuit parameters

I talked about the different modes of operation. To operate a transistor in a particular mode of opration, you need proper biasing. In simple terms, biasing means apply potential or voltage to the input and output terminal of the transistor to get the desired mode of operation. 

In BJT analysis, a load line is a line drawn over collector curves to show every possible operating point of a transistor. Or on a load line, there are valid values of IC and VCE.

I am going to consider a base bias amplifier circuit. Although this biasing technique has many flaws it is a simple circuit and a beginner can easily understand this. 

Figure: Base biased amplifier circuit

The purpose of this section is to plot the DC load line:

The DC load line contains possible DC values of IC and VCE for a given amplifier.

To draw a line you need two points (according to mathematics). The load line is drawn between these two extremes is the saturation point and the cut-off point. We need to find out at what point collector current is maximum (that is the saturation point). And the second point is the maximum possible collector to emitter voltage (that is the cut off point).

Method:

You can locate saturation and cut off point with the help of circuit analysis methods that is KVL and KCL.

Look at the circuit in figure 1. The DC equivalent of this circuit is given below. 

Figure: DC equivalent circuit

Look at the simple circuit below. Apply KVL to the output side.

-VCC + ICRC + VCE  = 0

ICRC = VCC - VCE

IC = (VCC - VCE )/RC 

IC = VCC/RC - VCE/RC .. equation 1

Equation 1 is the equation for the load line. We have to draw it over output characteristics curves. 

Look at equation 1, and compare it with the straight-line equation.

y = mx + c

Here, c = VCC/RC 

And  m = slope = -1/RC 

For y-intercept, x = 0 (that is VCE = 0)

IC = VCC/RC … Point 1

For x-intercept, y = 0 (that is IC = 0)

VCE = VCC … Point 2

Figure: load line and Q point general formula

Look at point 1, it is the extreme of saturation region while point 2 is the extreme of the cut off region.

I have plotted the line by joining Point 1 and Point 2 over the characteristic curves. This is the load line. The line intersects the curve at the Q point. It means the Q point is determined by IC and VCE. 

Point 1 intersects the curve at the saturation region of collector curves. It tells you the maximum collector current for the circuit.  While point 2 intersects the curve at the cut off region of collector curves. This point tells you the maximum collector-emitter voltage for the circuit. 

Plotting The Q Point:

You have successfully drawn a load line. Now the second step is to locate a Q point. 

Consider DC equivalent circuit in fig 2,

Apply KVL to the input side

-VCC + IBRB + VBE = 0

IB = (VCC - VBE)/RB

ICQ = βIB

Apply KVL to the output side

-VCC + ICRC + VCE = 0

VCEQ = VCC - ICQRC

Steps involved in load line and Q point analysis:

• Draw DC equivalent circuit
• In DC analysis we assume all the capacitors are open circuit
• Apply KVL to the input side and find out ICQ
• Apply KVL to the output side and find out VCEQ
• Find out maximum collector current IC(sat). You need to consider VCE = 0
• Find out a maximum collector to emitter voltage VCE(cut off). You need to consider IC = 0
• Draw the load line
• Locate the Q point with the help of calculated values of ICQ and VCEQ

Example#1:

Figure: Base biased amplifier

Apply KVL to the input side:

-VCC + IBRB + VBE = 0 

IB = (VCC - VBE)/RB

IB = (10-0.7)/300k

IB = 31 μA

IC = βIB

Consider β = 100

ICQ= 3.1 mA

Apply KVL to the input side:

-VCC + ICRC + VCE = 0… equation 1

VCE = VCC - ICRC

VCE = 10 - 3.1 m*2k

VCEQ = 3.8 V 

Equation 1 is the load line equation

-VCC + ICRC + VCE = 0

For maximum collector current IC(sat), substitute VCE = 0

IC(sat) = VCC/RC

IC(sat) = 10/2k

IC(sat) = 5 mA

For maximum collector to emitter voltage VCE(cut off), substitute IC = 0

  VCE = VCC

VCE(cut off) = 10 V

Figure: Load line and Q point 

Conclusion:

It is all about DC load line analysis. There is an AC load line as well. It is an important topic in designing a BJT based circuit. The two load lines must consider while designing an amplifier circuit.