Current Division Rule:

Current Divider Rule is a renowned method of solving parallel circuits. You can solve parallel circuits using Ohm's law. But Ohm's law has a limitation. You have to know the voltage across parallel elements. This method allows you to find out the current flowing through parallel elements without knowing the voltage across it.  This procedure is derived from two very popular circuit solving laws, is Ohm's law and KCL. In this article, I am going to derive the expression of the current divider rule as well. 

Explanation:

It is only acceptable to parallel circuits where the voltage remains the same throughout the circuit. Consider a parallel circuit given below.

Figure 1: A parallel circuit

Let,

i1 = Current across R1

i2 = Current across R2

i3 = Current across R3

IT = total current across the circuit

V1 = voltage across each element

Apply KCL,

IT = i1 + i2 + i3  ….. Equation 1

From Ohm's law, i = v/R, replace "i" in Equation 1.

IT = V1/ R1 + V1/R2 +V1/R3 

IT = V1 (1/R1 + 1/R2 + 1/R3)

As you know formula for parallel resistances is

1/RT = 1/R1+1/R2+1/R3

RT = R1 || R2 || R3

IT = V1 /RT 

IT = V1/RT..... Equation 2

Now, if you want to find the current across R2, then using Ohm's law:

i2 = V1/R2 …... Equation 3

Now, solve Equation 2 and Equation 3 to get the value of i2 which is independent of V1.

IT*RT = i2*R2

Or

i2 = IT*RT/R2

Similarly, 

i1 = IT*RT/R1

i2 = IT*RT/R2

i3 = IT*RT/R3

These are the equations of current in parallel circuits which are independent of voltage. It is only applicable to parallel circuits only. These types of circuits are also called Current Divider Circuits because of the current divide among all the resistances. As you know the current adopts the least resistive path. So, the lower the resistance the higher the current flows through it.

Solved Example:

In the previous article (parallel resistance formula), I analysed and solved a parallel circuit using Ohm's law. In that case I use the following circuit.

Figure 2: Parallel circuit with a voltage source

In this tutorial, I am going to solve the same examples with the help of the current divider rule. In this example I am going to use the circuit in figure 3. Both circuits (Circuits in figure 2 and figure 3) are the same irrespective of the current and voltage sources. In the later circuit a voltage source is replaced by the equivalent current source. 

Figure 3: Parallel circuit with an equivalent current source

Example 1:

Determine total or equivalent resistance and the current flows through each resistor with the help of the current divider rule.

I solved this problem in my previous article (parallel resistance formula).

This is another way to solve this problem.

Find total resistance RT

RT = 1/R1 + 1/R2 + 1/R3

RT = 545.5 Ω

Apply CDR on each resistor.

Current through R1 is i1,

i1 = IT*RT/R1

i1 = 18*545/1000

i1 = 9.8 mA

Current through R2 is i2,

i2 = IT*RT/R2

i2 = 18*545/2000

i2 = 4.9 mA

Current through R3 is i3,

i3 = IT*RT/R3

i3 = 18*545/3000

i3 = 3.2 mA

Conclusion:

Subsequently reviewing the current divider rule, its derivation and a solved example, it is deduced that:

• This technique is useful in finding the current flows through the resistors without knowing the voltage

• The lesser the resistance the larger the current 

• It is only acceptable to parallel circuits only

The NOT Gate - Introduction & Design

 

The Inverter:

This performs the inverse operation of the buffer. It is also called the NOT gate. Output is the complement of the input. The inverter performs an inversion operation, changing one logic level to the other. 

Learning Objectives:

• Introducing AND gate implementation using

• Switches

• Diodes

• BJT

It has the same circuit symbol as that of a buffer except for the bubble present at the output side. This is the inversion bubble.

Logical Expression:

A = YC

The NOT
Input A	Output Y
0	1
1	0

Logical NOT Gate (Explain with the help of switches)

Look at the switch model, if the switch is closed (ON), the LED turns off. 

Similarly, if the switch is opened (OFF), the LED turns on. 

NOT Gate Using Universal Gates

Implementation Using Transistor Logic

When switch S1 is closed, the base-emitter junction is forward biased. Q1 is ON. No current flows from the LED. Similarly, when S1 is opened in the second case, the base-emitter junction is reversed biased. Q2 is OFF. LED turns ON in this case and hence the output is high. 

Implementation Using CMOS Logic

The Buffer Gate - Introduction &Design

 

The Buffer:

The first basic gate is a buffer. Output is the same as the input. 

Learning Objectives:

• Introducing buffer implementation using

• Switches

• Diodes

The logic symbol is the same as that of a NOT gate except the bubble. 

Logical Expression:

A = Y

The Buffer
Input A	Output Y
0	0
1	1

Logical Buffer (Explain with the help of switches)

The switch model

In practical life, we never use a switch as a buffer. The purpose of a switch model is to explain easily. Just like a switch, its purpose is to transfer the input to the output. There are so many different ways to implement the buffer logic. We will limit our study to a very basic buffer circuit. 

In digital circuit design, there are various ways to implement the buffer. 

Two inverters in series can act as a buffer:

Simple and easy task. Two inverters in series will produce the same logic as that of input. In this way the input inverses two times and the output is the same as that of the input.

Buffer with the help of an AND gate:

Consider a two-input AND gate. Connect both of its input terminals. It works as a buffer. Have a look at the schematic diagram.

Buffer with the help of an OR gate:

Consider a two-input OR gate. Connect both of its terminals. It will act as a buffer. 

Note: there is a difference between input wave and output wave amplitude. This is because every practical circuit experiences a voltage drop. The drop is due to the internal circuitry of the logic gates.

Three different ways to implement Buffer Logic

Implementation Using CMOS Logic

Two back to back inverters work as a buffer. 

The CMOS Buffer Circuit

The XNOR Gate

The XNOR Gate:

The logic symbol is the same as the XOR gate with an inversion bubble placed at the output side. The exclusive NOR gate produces an inverted output as that of the XOR gate.

Learning Objectives:

• Introducing XNOR gate implementation using

• Switches

• Diodes

• BJT

Working:

Case 1: 

Input A = 0

Input B = 0

Output = 1

Case 2:

Input A = 0

Input B = 1

Output = 0

Case 3:

Input A = 1

Input B = 0

Output = 0

Case 4:

Input A = 1

Input B = 1

Output = 1

2 Input XNOR Gate
Input A	Input B	Output
0	0	1
1	0	0
0	1	0
1	1	1

Logical Expression:

Y = A + B

Logical XNOR Gate (Explain with the help of switches)

The XNOR switch model contains 4 switches. Switch A and its complement switch AC. Similarly, there is a switch B and its complement switch BC. Output goes high when both inputs are either zero or high. The switch circuit fulfils both conditions. When switch A and switch B are closed (logic 1), output goes high. Similarly, when switch A and switch B are opened (logic 0) the complement switches AC and BC are logic high. Output goes high in this case as well.

Implementation Using Diode Logic

The XNOR gate diode (DTL) circuit was not an easy task. I tried many different ways but I failed. Finally, I draw a schematic that contains a transistor at the end of the bridge circuit. It performs an inversion operation. The whole circuit is similar to the XOR diode circuit except for the last transistor. 

Case 1:

Look at the schematic in case 1. Both switches are open. All diodes remain turned off. The transistor is also turned off. Output (LED is turned on) is high.

Case 2:

In this case, switch S1 is connected to a 5V source while S2 remains connected to the ground. S1 is connected to the diode D1, and D1 is connected to the transistor Q1. It turns on Q1. No current flows from the LED and hence the output is low.

Case 3:

Same as case 2.

Case 4:

Look at the schematic in case 4. Switches S1 and S2 are connected to 5V sources. S1 turns on D1 and S2 turns on D2. Look at node 2. There is no potential difference at this node and hence no current will flow from this path. No current will flow to the base of Q1 and transistor Q1 will remain turned off. Output goes high.

Implementation Using Transistor Logic

It is surprisingly easy to design a BJT based XNOR gate. It only contains two BJT transistors. Collectors are connected. Bases are connected to the 5V source via switches S1 and S2. The emitter of Q1 is connected to S2 and the emitter of Q2 is connected to S1. The configuration is the same as that of the XOR gate. The only difference is the third Transistor which performs inversion operation (in the case of the XOR gate). 

Case 1:

Look at the schematic, both switches S1 and S2 are open. Both transistors are off. No current will flow from the transistors. The output will be high.

Case 2:

In this case, switch S1 is connected to a 5V source. The base of Q1 is connected to S1 and the emitter of Q1 is connected to S2 which is grounded. Transistor Q1 is on and all the current flows through Q1. Output remains low.

Case 3: 

Same as case 2.

Case 4:

Look at the schematic in case 4. Both switches S1 and S2 are connected to 5V sources. The base of Q1 is connected to V1 and the emitter of Q1 is connected to V2. So, the is no potential difference between base and emitter and hence

VBE = 0

Similarly, this is true for Q2. Both transistors are off. And hence output goes high.