BJT Q Point Variation & Voltage Swing Limitations (Fixed | Base Bias Circuit)

Fixed Bias Analysis In Cut off Mode, Saturation Mode, Active Mode | Q Point Analysis in Saturation, Cut off & Active Mode

BJT Load Line & Q point Analysis: Complete tutorial with solved examples

Objectives:
  • How to select Q point according to the application?
    • Centred Q point
    • Q point near saturation
    • Q point near the cutoff
  • How to determine the amplitude of output voltage 
This topic helps you to design an amplifier.

Biasing & Selection Of Q Point:

As I discussed, proper biasing is required for different modes of operation. There are three different positions of Q point on a load line. Biasing helps to set the Q point according to your needs.

Centered Q Point:

Maximum possible peak to peak voltage or maximum AC output compliance can achieve with the help of a centred Q point.

When the Q point is in the middle of the load line, then

ICQ*rC = VCEQ  equation 3

And hence output signal swings equally above and below the Q point without any clipping or distortion. It means the transistor drives into an active region.

Example 1:

Fig 1 Schematic for centred Q point

Step 1: Find DC load line
KVL at the output circuit
-VCC + ICRC + VCE = 0
-10 + 1k*IC + VCE = 0 … eq 1.1
Substitute VCE = 0 in eq 1.1 for a point on the y-axis
IC = 10mA
Substitute IC = 0 in eq 1.1 for a point on the x-axis
VCE = 10V

Step 2: Find Q point 
KVL at the input circuit
-VCC + IBRB + VBE = 0
IC = β*IB
-10 + ICQ*140k/100 + 0.7 = 0
ICQ = 6.6mA

KVL at the output circuit
-VCC + ICRC + VCEQ = 0
-10 + 6.6m*1k + VCEQ = 0
VCEQ = 3.4V

Step 3: Find AC load line
iC(sat) = ICQ + VCEQ/rC
rC = RC||RL
iC(sat) = 6.6m + 3.4/500
iC(sat) = 6.6m + 6.8m
iC(sat) = 13.4mA

vce(cut) = VCEQ + ICQ*rC
vce(cut) = 3.4 + 6.6m*500
vce(cut) = 6.7V

Step 4: Evaluate Output Compliance:
ICQ*rC = VCEQ
6.6m*500 = 3.4
3.3 ~ 3.4

Results:
Fig 2 Q point at the centre of AC load line
Look at the graph shown in the figure, you can easily understand by visualizing the graph. You can see VCEQ is almost equal to ICQ*rC. And hence signal swings equally on both sides of the Q point.

Q Point Near Saturation:

When the Q point is above the midpoint of an AC load line then equation 3 becomes
ICQ*rC > VCEQ

In this case, the output swing is limited by VCEQ. This type of clipping means the transistor drives into the saturation region. 

Example 2:

Fig, 3 Schematic for Q point near saturation

Step 1: Find DC load line

KVL at the output circuit
-VCC + ICRC + VCE = 0
-10 + 1k*IC + VCE = 0 … eq 2.1
Substitute VCE = 0 in eq 2.1 for a point on the y-axis
IC = 10mA
Substitute IC = 0 in eq 2.1 for a point on the x-axis
VCE = 10V

Step 2: Find Q point 

KVL at the input circuit
-VCC + IBRB + VBE = 0
IC = β*IB
-10 + IC*120k/100 + 0.7 = 0
ICQ = 7.75mA

KVL at the output circuit
-VCC + ICRC + VCE = 0
VCEQ = 10 - 7.75
VCEQ = 2.25V

Step 3: Find AC load line
iC(sat) = ICQ + VCEQ/rC
rC = RC||RL
iC(sat) = 7.75m + 2.25/500
iC(sat) = 12.25mA

vce(cut) = VCEQ + ICQ*rC
vce(cut) = 2.25 + 7.75m*500
vce(cut) = 6.125V

Step 4: Evaluate Output Compliance:
Check for both compliances.

PP =2* VCEQ = 4.4V
PP = 2*ICQ*rC = 7.7
Amplifier compliance is the smaller value, which is  4.4V.

Results:
Fig 4 Q point lies near saturation region or above the middle point of AC load line

Look at the graph shown in the figure, you can easily understand by visualizing the graph. The signal clips near the saturation region. Also, ICQ*rC is greater than VCEQ.

Q Point Near Cut off:

When the Q point is below the midpoint of an AC load line then equation 3 becomes
ICQ*rC < VCEQ

In this case, the output swing is limited by ICQ*rC. This type of clipping means the transistor drives into the cut off region. 

Example 3:

Fig 5 Schematic for Q point near cut off

Step 1: Find DC load line
KVL at the output circuit
-VCC + ICRC + VCE = 0
-10 + 1k*IC + VCE = 0 … eq 3.1
Substitute VCE = 0 in eq 3.1 for a point on the y-axis
IC = 10mA
Substitute IC = 0 in eq 3.1 for a point on the x-axis
VCE = 10V

Step 2: Find Q point
KVL at the input circuit
-VCC + IBRB + VBE = 0
IC = β*IB
-10 + ICQ*180k/β + 0.7 = 0
ICQ = 5.2mA

KVL at the output circuit
-VCC + ICRC + VCE = 0
-10 + 5.2m*1k + VCEQ = 0
VCEQ = 4.8V

Step 3: Find AC load line
iC(sat) = ICQ + VCEQ/rC
rC = RC||RL
iC(sat) = 5.2m + 4.8/500
iC(sat) = 14.8mA

vce(cut) = VCEQ + ICQ*rC
vce(cut) = 4.8 + 5.2m*500
vce(cut) = 7.4V


Step 4: Evaluate Output Compliance:

Check for both compliances.

PP =2* VCEQ = 9.6V
PP = 2*ICQ*rC = 5.2V
Amplifier compliance is the smaller value, which is  5.2V.

Results:
Fig 6 Q point near cut off or lies below the midpoint of AC load line
Look at the graph shown in the figure, you can easily understand by visualizing the graph. I have marked VCEQ and ICQ*rC. You can see VCEQ is greater than  ICQ*rC. And hence the signal clips near the cut-off region.

Conclusion:

  1. Have you noted, the DC load line remains the same in all three examples. Because it has a slope of 1/RC. RC remains the same in all examples
  2. AC Load Line varies with change in RB
  3. As RB increases, IB decreases (and hence IC decreases)
  4. Higher values of RB drives the BJT in cut off mode
By - No comments:
Labels: , , ,

Bipolar Junction Transistor -BJT AC Load Line Analysis Solved Examples

AC Load Line BJT | Base biased amplifier AC analysis | Maximum Peak to peak voltage

BJT Load Line & Q point Analysis: Complete tutorial with solved examples. Explain ac load line with respect to BJT. Transistor Load Line Analysis




In the previous section, I discussed the DC load line. There is an AC load line as well. The purpose of the AC load line is similar to its DC counterpart. It gives all possible values of ic and vce of a given amplifier. It also determines the magnitude of output voltage.

Fig 1 Base bias circuit

Fig 2 AC equivalent of the circuit in fig 1

The purpose of this section is to draw the AC load line:

The DC load line is drawn between two extremes that are the saturation point and the cut-off point. The AC saturation and cut off points are different from their counterpart DC load line. The Q point is common to both the load-lines. 

This is a little bit confusing for beginners, but I tried to make it easier. As you know Q point is calculated when no signal is applied to the input. When an input is applied the AC quantities (ic and vce) vary above and below Q point. 

AC saturation point: (ic(sat))
Fig 3: AC quantities vary above and below Q point

 Look at AC equivalent circuit. 
rC = RC || R1
ic =  vce / rC
∆IC =  ∆VCE / rC
OR
∆IC = ( VCEQ - vce)/ rC

Substitute vce = 0 for saturation point on y-axis 
∆IC = VCEQ / rC
From fig 3
ic(sat) = ICQ + ∆IC
Substitute ∆IC, and we get AC saturation point ic(sat)
ic(sat) = ICQ + VCEQ/rC … equation 1

Note: Equation 1 shows the upper limit of the signal swing

AC Cutoff Voltage: (vce(cut-off))
vce  = iC*rC
∆VCE = ∆IC*rC
∆VCE = (ICQ -iC)*rC

Substitute iC = 0 , for cutoff point on x-axis
∆VCE = ICQ*rC
From fig 3 
vce(cutoff) = VCEQ + ∆VCE
Substitute ∆VCE, and we get AC cutoff point vce(cutoff)
vce(cutoff) = VCEQ + ICQ*rC … equation 2

Note: Equation 2 shows the lower limit of the signal swing

Fig 4


AC Output Compliance:

What does an AC load line do? It usually describes the AC output compliance of a given amplifier. With the help of the AC load line, we can determine the maximum peak to peak unclipped output voltage. Output voltage clips, if the output compliance exceeds. 

By adjusting the Q point in the middle of the load line, we can get the maximum possible peak to peak unclipped output.

 

It is determined by the maximum peak to peak collector current IC and VCE with respect to Q point. 

The maximum possible transition for vce with respect to Q point is shown in figure 1(b), which is ∆VCE.

∆VCE = ICQ*rC

For peak to peak value, multiply by 2.

PP = 2ICQ*rC

Where,

PP = output compliance

Maximum possible transition for ic(sat) with respect to Q point is shown in figure 1(a), which is ∆IC.

∆IC = VCEQ / rC

For peak to peak value, multiply by 2.

PP = 2∆IC = 2VCEQ / rC

Where,

PP = output compliance
Fig 5 signal swings and different Q points

Example:

Fig 6

Consider the same circuit. Q point values have been calculated in the previous article. 
ICQ= 3.1 mA

VCEQ = 3.8 V
Calculate AC cut off and saturation.

ic(sat) = ICQ + VCEQ/rC
rC = RC || R1 = 666.667 ohms
ic(sat) = 3.1m + 3.8/666.66
ic(sat) = 3.1m + 5.7m
ic(sat) = 8.8 mA

vce(cutoff) = VCEQ + ICQ*rC
vce(cutoff) = 3.8 + 3.1m*666.6
vce(cutoff) = 3.8 + 2
vce(cutoff) = 4.8 V
Fig 7
Conclusion:

For a given amplifier, the AC load line intersects the DC load line at the Q point. 

The steeper the AC load line, the smaller will be the output voltage swing.

The results obtained in equation 1 and equation 2 are in terms of the Q point of the given amplifier.

What is next?
In the next post, you will learn about the Q point location on the load line.
  • Centred Q point
  • Q point near saturation
  • Q point near cut off

After a complete understanding of this topic, you will be able to design an amplifier.


By - No comments:
Labels: , ,
Subscribe to: Posts (Atom)

Popular Posts