Identifying The Mode Of The BJT | DC Analysis
Identifying The Mode Of The BJT (DC Analysis Part 2)
In a continuation of BJT analysis, it is important to have a look at this topic. Most of the time, it is necessary to evaluate the mode of the transistors.
Learning Objectives:
To find the operating region, we need to find;
Junction voltages
All currents
Now, it's time to discuss some important variations in parameters in each mode.
Saturation Mode:
In this mode, both junctions are forward biased. You need to calculate these parameters;
First of all you need to check out VBE. If VBE > 0.7 V, the transistor is either in active or saturation mode. Always assume the active mode and proceed with your calculations. Now calculate VCE, if you get absurd results, it means the transistor is in the saturation region.
\[V_{CE(sat)} = 0.2 V\]
\[I_{C(sat)} = \frac{V_{CC}-V_{CE(sat)}}{R_C}\]
Since VCE is very small as compared to VCC, neglect it.
\[I_{C(sat)} = \frac{V_{CC}}{R_C}\]
The base current is significantly high in saturation mode. The minimum value of base current to produce saturation is given below;
\[I_{B(min)} = I_{C(sat)}{\beta_{DC}\]
It is the minimum value of IB to drive the transistor in saturation. IB should be greater than IB(min). It is possible only when βDC is small. β is a device parameter, and it can not be changed. But keep in mind that β is forward current gain and it is for active mode only. βDC has a lower value in saturation mode.
Active Mode:
In this mode, the base emitter junction is forward biased and the base collector junction is reverse biased.
First of all you need to check out VBE. If VBE > 0.7 V, the transistor is either in active or saturation mode. Always assume the active mode and proceed with your calculations.
Cut-Off Mode:
It is the easiest mode to analyse. Both junctions are reverse biased. All currents are zero except small leakage current.
\[V_{CE(cut-off)} = V_{CC}\]
You need to evaluate VBE only. If VBE < 0.7 V, the transistor is in cut-off.
Steps to follow:
Calculate IC(sat) and VCE(cut) . With the help of these two points you can draw the load line.
Assume that the transistor is in active mode.
In the next step, apply KVL at the input loop. You will get the IB and hence IC
Now apply the KVL equation at the output loop. You will get VCE
You get the load line and the Q point (VCE , IC). Plot these two points on the load line.
Compare;
VCE > VCE(sat)
IC < IC(sat)
The transistor is in active mode
Example #1: Determine IC(sat) and VCE(cut-off).
For IC(sat), assume a short between collector and emitter. Because in saturation mode VCE is approximately equal to zero. Apply KVL at the output loop.
\[-V_{CC} + I_CR_C + V_{CE}= 0\]
\[I_{C(sat)} = \frac{20}{3.3k} = 6mA\]
\[V_{CE(cut)} = V_{CC}\]
Example #2:
Now change parameters in figure 1, and determine its mode.
RB = 33kΩ
hfe = β = 100
Assume the transistor is in active mode.
Step 1: Apply KVL at the input loop.
\[-V_{BB}+I_B*R_B+V_{BE}=0\]
\[I_B=\frac {V_{BB}-V_{BE}}{R_B}\]
\[I_B=\frac{10-0.7}{33k}\]
\[I_B=0.28mA\]
\[I_C=\beta I_B\]
\[I_C=100*0.28m = 28mA\]
Step 2: Apply KVL at the output loop.
\[-V_{CC}+I_C*R_C+V_{CE}=0\]
\[-20+28m*3.3k+V_{CE}]=0\]
\[V_{CE}=-72.4V\]
Have a look at VCE. Is it possible to get such results? How do VCE = -72.4V, when the applied voltage is 20V. Similarly, the value of IC = 28mA which is not possible. The assumption goes wrong. The transistor is not in the active mode. Again calculate β , IC(sat) and VCE(sat) for saturation mode.
Calculate β for saturation mode.
\[\beta = \frac {I_C}{I_B}\]
\[\beta = 21.4\]
Calculate IC for saturation which is already calculated.
\[-V_{CC} + I_CR_C + V_{CE}= 0\]
\[I_{C(sat)} = \frac{20}{3.3k} = 6mA\]
Calculate VCE.
\[-V_{CC} + I_CR_C + V_{CE}= 0\]
\[-20+6m*3.3k + V_{CE}=0\]
\[V_{CE}=0.2\]
On a final note, look at the value of IB which is quite large, and tends to decrease the value of β. The decreased value of β shows that the transistor is saturated. Aslo, VCE = VCE(sat) = 0.2V. You can check out with the help of a multimeter as well. I attached the schematic and it shows the value of VCE which is quite low and indicates that the transistor is saturated.
Example #3:
Now change parameters in figure 1, and determine its mode.
VBB = 5V
hfe = β = 200
IC(sat) = 6mA (calculated previously)
From the given data, it is evident that the value of voltage at the base (that is VBB) changes will result in change of base current (that is IB). Similarly hfe (that is β) increases will change the base current. Assume the active mode and proceed with calculations.
Step 1: Apply KVL at the input loop.
\[-V_{BB}+I_B*R_B+V_{BE}=0\]
\[I_B=\frac {V_{BB}-V_{BE}}{R_B}\]
\[I_B=\frac{5-0.7}{1M}\]
\[I_B=4.3 \mu A\]
\[I_C=\beta I_B\]
\[I_C=200*4.3 \mu = 0.86mA\]
Step 2: Apply KVL at the output loop.
\[-V_{CC} + I_CR_C + V_{CE}= 0\]
\[-20+0.86m*3.3k + V_{CE}=0\]
\[V_{CE}=17.2V\]
VCE > VCE(sat)
IC < IC(sat)
The transistor is in active mode.
Example #4:
Now change parameters in figure 1, and determine its mode.
RC = 10kΩ
hfe = β = 50
The value of RC changes, will result in a changed value of IC(sat). Assume the transistor is in active mode and proceed with calculations.
Calculate IC(sat) first. Assume VCE = 0.
\[-V_{CC} + I_CR_C + V_{CE}= 0\]
\[I_{C(sat)} = \frac{20}{10k} = 2mA\]
\[V_{CE(cut)} = V_{CC}\]
Step 1: Apply KVL at the input loop.
\[-V_{BB}+I_B*R_B+V_{BE}=0\]
\[I_B=\frac {V_{BB}-V_{BE}}{R_B}\]
\[I_B=\frac{10-0.7}{1M}\]
\[I_B=9.3 \mu A\]
\[I_C=\beta I_B\]
\[I_C=50*9.3 \mu = 0.46mA\]
Step 2: Apply KVL at the output loop.
\[-V_{CC} + I_CR_C + V_{CE}= 0\]
\[-20+0.46m*10k + V_{CE}=0\]
\[V_{CE}=15.4V\]
VCE > VCE(sat)
IC < IC(sat)
The transistor is in active mode.
Example #5:
Now change parameters in figure 1, and determine its mode.
VCC = 10V
hfe = 100
Calculate IC(sat). for this calculation, set VCE(sat) = 0.
\[-V_{CC} + I_CR_C + V_{CE}= 0\]
\[I_{C(sat)} = \frac{V_{CC}}{R_C}\]
\[I_{C(sat)} = \frac{10}{3.3k}\]
\[I_{C(sat)} = 3mA\]
\[V_{CE(cut)} = V_{CC}\]
Assume that the transistor is in active mode.
Step 1: Apply KVL at the input loop.
\[-V_{BB}+I_B*R_B+V_{BE}=0\]
\[I_B=\frac {V_{BB}-V_{BE}}{R_B}\]
\[I_B=\frac{10-0.7}{1M}\]
\[I_B=9.3 \mu A\]
\[I_C=\beta I_B\]
\[I_C=100*9.3 \mu = 0.93mA\]
Step 2: Apply KVL at the output loop.
\[-V_{CC} + I_CR_C + V_{CE}= 0\]
\[-10+0.93m*3.3k + V_{CE}=0\]
\[V_{CE} = 6.9V\]
VCE > VCE(sat)
IC < IC(sat)
The transistor is in active mode.
Example #6:
Various sets of parameters are given for the circuit. Determine the mode of the transistor accordingly.
Calculate IC(sat) and VCE(cut). This is for the load line.
\[I_{C(sat)}=\frac {V_{CC}}{R_C}\]
\[I_{C(sat)}=\frac{5}{479}=11mA\]
\[V_{CE(cut)} = V_{CC}\]
Assume that the transistor is in active mode.
Step 1: Apply KVL at the input loop.
\[-V_{BB}+I_B*R_B+V_{BE}=0\]
\[I_B=\frac {V_{BB}-V_{BE}}{R_B}\]
\[I_B=\frac{5-0.7}{680k}\]
\[I_B=6.3 \mu A\]
\[I_C=\beta I_B\]
\[I_C=100*9.3 \mu = 0.63mA\]
Step 2: Apply KVL at the output loop.
\[-V_{CC} + I_CR_C + V_{CE}= 0\]
\[-5+0.63m*470 + V_{CE}=0\]
\[V_{CE} = 4.7V\]
VCE > VCE(sat)
IC < IC(sat)
The transistor is in active mode.
Example #7:
Now change parameters in figure 6, and determine its mode.
RB = 47kΩ
hfe = β = 100
Step 1: Apply KVL at the input loop.
\[-V_{BB}+I_B*R_B+V_{BE}=0\]
\[I_B=\frac {V_{BB}-V_{BE}}{R_B}\]
\[I_B=\frac{5-0.7}{47k}\]
\[I_B=91 \mu A\]
\[I_C=\beta I_B\]
\[I_C=100*91 \mu = 9.1 mA\]
Step 2: Apply KVL at the output loop.
\[-V_{CC} + I_CR_C + V_{CE}= 0\]
\[-5+9.1m*470 + V_{CE}=0\]
\[V_{CE} = 0.72V\]
VCE > VCE(sat)
IC < IC(sat)
The transistor is in active mode.
Example #8:
Now change parameters in figure 6, and determine its mode.
VBB = 10V
hfe = β = 500
Step 1: Apply KVL at the input loop.
\[-V_{BB}+I_B*R_B+V_{BE}=0\]
\[I_B=\frac {V_{BB}-V_{BE}}{R_B}\]
\[I_B=\frac{10-0.7}{680k}\]
\[I_B=13.6 \mu A\]
\[I_C=\beta I_B\]
\[I_C=500*13.6 \mu = 6.8 mA\]
Step 2: Apply KVL at the output loop.
\[-V_{CC} + I_CR_C + V_{CE}= 0\]
\[-5+6.8m*470 + V_{CE}=0\]
\[V_{CE} = 1.78V\]
VCE > VCE(sat)
IC < IC(sat)
The transistor is in active mode.
Example #9:
Now change parameters in figure 6, and determine its mode.
RC = 10kΩ
hfe = β = 100
Calculate IC(sat)
\[-V_{CC} + I_CR_C + V_{CE}= 0\]
\[-5+I_C*10k + V_{CE}=0\]
VCE = 0.2 for saturation
\[I_{C(sat)} = \frac{5-0.2}{10k}\]
\[I_{C(sat)} = 0.48mA\]
Step 1: Apply KVL at the input loop.
\[-V_{BB}+I_B*R_B+V_{BE}=0\]
\[I_B=\frac {V_{BB}-V_{BE}}{R_B}\]
\[I_B=\frac{5-0.7}{680k}\]
\[I_B=6.3 \mu A\]
\[I_C=\beta I_B\]
\[I_C=100*6.3 \mu = 0.6 mA\]
Step 2: Apply KVL at the output loop.
\[-V_{CC} + I_CR_C + V_{CE}= 0\]
\[-5+0.6m*10k + V_{CE}=0\]
\[V_{CE} = -1.3 V\]
VCE < VCE(sat)
IC > IC(sat)
The assumption goes wrong. The transistor is in saturation mode. The calculated value of IC is greater than IC(sat) . Which is not possible. Discard IC = 6mA. The maximum possible current is IC(sat) = 0.48 mA. The value of VCE is also an absurd value. We need to recalculate VCE with the help of IC(sat).
\[-V_{CC} + I_CR_C + V_{CE}= 0\]
\[-5+0.48m*10k + V_{CE}=0\]
\[V_{CE} = 0.2 V\]
Example #10:
Now change parameters in figure 6, and determine its mode.
VCC = 10V
hfe = β = 100
VCC changes, it will change the value of IC(sat). Calculate IC(sat)
\[-V_{CC} + I_CR_C + V_{CE}= 0\]
\[-10+I_C*470 + V_{CE}=0\]
VCE = 0.2 for saturation
\[I_{C(sat)} = \frac{10-0.2}{10k}\]
\[I_{C(sat)} = 0.21mA\]
VCE(cut) = VCC
Step 1: Apply KVL at the input loop.
\[-V_{BB}+I_B*R_B+V_{BE}=0\]
\[I_B=\frac {V_{BB}-V_{BE}}{R_B}\]
\[I_B=\frac{5-0.7}{680k}\]
\[I_B=6.3 \mu A\]
\[I_C=\beta I_B\]
\[I_C=100*6.3 \mu = 0.6 mA\]
Step 2: Apply KVL at the output loop.
\[-V_{CC} + I_CR_C + V_{CE}= 0\]
\[-10+0.6m*470 + V_{CE}=0\]
\[V_{CE} = 9.7 V\]
VCE > VCE(sat)
IC < IC(sat)
Active mode is detected.
Lastly:
I have given a tremendous amount of time in creating this article. Time is really precious to me because of a busy schedule. If you like this tutorial, please drop a comment and like my Facebook page.
Please check part 1 of this tutorial in the link below.
BJT DC Analysis Part 1
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