Collector Feedback Bias - AC | DC Load Line & Q Point Calculations

Learning Objectives:

• What is collector feedback bias?
• Evaluate Q point, AC load line, DC load line
• How to select Q point according to the application?
• Centred Q point
• Q point near saturation
• Q point near the cutoff 
• Maximum possible peak to peak voltage

This topic helps you to design collector feedback bias circuits.

This is another biasing technique of BJT based circuits. In this technique, a resistor is connected in between base and collector terminals. The collector terminal provides biasing voltage for the base emitter terminal. 

There are a similar number of components required as it is in base bias. But it is far more stable than the base bias circuit. The circuit has better stability that is thermal or bias stability. 

The important aspect of this bias is that it is designed to work only in the active region.

Fig 1: A Collector feedback bias

DC Load Line:

KVL at the output circuit.

-VCC + ICRC + IBRC + VCE = 0 ..eq 1

IB = IC/β

Substitute IB, equation 1 becomes

-VCC + ICRC + (IC/β)*RC + VCE = 0

-VCC + ICRC (1+ 1/β) + VCE = 0..eq2

Substitute VCE = 0 in ..eq2

VCC = ICRC(1+1/β)

IC = VCC/RC(1+1/β)

With the help of approximation 1+1/β = 1

IC = VCC/RC ..eq3

Substitute IC = 0 in ..eq2

VCE = VCC ..eq4

Q Point (VCEQ , ICQ):

Apply KVL to the input circuit.

-VCC + ICRC + IBRB + VBE = 0 ..eq5

IB = IC/β

Substitute IB and solve for IC

-VCC + ICRC + ICRB/β+ VBE = 0

-VCC + IC(RC + RB/β)+ VBE = 0

ICQ = (VCC - VBE) / (RC + RB/β)..eq6

KVL at output circuit.  

-VCC + ICRC + IBRC + VCE = 0 ..eq7

IB = IC/β

Substitute IB and solve for VCE

VCE = VCC - ICRC - ICRC/β

VCE = VCC - ICRC(1+ 1/β)

1+1/β ~ 1

VCEQ = VCC - ICRC..eq8

AC Load Line:

I am not going into the details of AC load line. 

iC(sat) = ICQ + VCEQ/rC..eq9

vce(cut) = VCEQ + ICQ*rC..eq10

Example 1: RB = 40k

Step 1: DC Load Line

From eq3 and eq4

VCE = 10V

IC = 10mA

Step 2: Q Point (VCEQ , ICQ)

From eq6

ICQ = (VCC - VBE) / (RC + RB/β)

ICQ = (10 - 0.7) / (1k + 40k/100)

ICQ = 6.6mA

From eq8

VCEQ = VCC - ICRC

VCEQ = 10 - 6.6m*1k

VCEQ = 3.4V

Step 3: AC Load Line

From eq9

iC(sat) = ICQ + VCEQ/rC

iC(sat) = 6.6m + 3.4/500

iC(sat) = 6.6m + 6.8m

iC(sat) = 13.4mA

From eq10

vce(cut) = VCEQ + ICQ*rC

vce(cut) = 3.4 + 6.6m*500

vce(cut) = 6.7V

Step 4: Maximum Peak To Peak Voltage:

It is also called output compliance. I discussed it in detail in base bias analysis.

We will check for both compliances. Amplifier compliance will be the smaller value.

PP =2* VCEQ = 6.8V

PP = 2*ICQ*rC = 6.6V

Since the Q point is almost in the middle of the AC load line. Hence both compliances are almost the same. It is also visible in the figure below

Fig 2: Example 1

Example 2: RB = 100k

Step 1: DC Load Line

From eq3 and eq4

VCE = 10V

IC = 10mA

Step 2: Q Point (VCEQ , ICQ)

From eq6

ICQ = (VCC - VBE) / (RC + RB/β)

ICQ = (10 - 0.7) / (1k + 100k/100)

ICQ = 4.65mA

From eq8

VCEQ = VCC - ICRC

VCEQ = 10 - 4.65m*1k

VCEQ = 5.35V

Step 3: AC Load Line

From eq9

iC(sat) = ICQ + VCEQ/rC

iC(sat) = 4.65m + 5.35/500

iC(sat) = 4.65m + 10.7m

iC(sat) = 15.35mA

From eq10

vce(cut) = VCEQ + ICQ*rC

vce(cut) = 5.35 + 4.65m*500

vce(cut) = 7.6V

Step 4: Maximum Peak To Peak Voltage:

We will check for both compliances. Amplifier compliance will be the smaller value.

PP =2* VCEQ = 10.7V

PP = 2*ICQ*rC = 4.65V

Output compliance is the smaller value and hence it is 4.65V. Or you can say maximum peak to peak voltage swing should not be greater than 4.65V.

Fig 3: Example 2

Example 3: RB = 150k

Step 1: DC Load Line

From eq3 and eq4

VCE = 10V

IC = 10mA

Step 2: Q Point (VCEQ , ICQ)

From eq6

ICQ = (VCC - VBE) / (RC + RB/β)

ICQ = (10 - 0.7) / (1k + 150k/100)

ICQ = 3.72mA

From eq8

VCEQ = VCC - ICRC

VCEQ = 10 - 3.72m*1k

VCEQ = 6.28V

Step 3: AC Load Line

From eq9

iC(sat) = ICQ + VCEQ/rC

iC(sat) = 3.72m + 6.28/500

iC(sat) = 3.72m + 12.56m

iC(sat) = 16.28mA

From eq10

vce(cut) = VCEQ + ICQ*rC

vce(cut) = 6.28 + 3.72m*500

vce(cut) = 8.14V

Step 4: Maximum Peak To Peak Voltage:

We will check for both compliances. Amplifier compliance will be the smaller value.

PP =2* VCEQ = 12.56V

PP = 2*ICQ*rC = 3.72V

Output compliance is the smaller value and hence it is 3.72V. Or you can say maximum peak to peak voltage swing should not be greater than 3.72V.

Fig 4: Example 3

Conclusion:

You have observed the different values of RB and Q point position on the load line. Q point remains in the active region for a wide range of RB. In collector feedback bias, as you decrease RB, the Q point shifts towards saturation but doesn't reach the saturation region.